Welcome to FP7 ICT-RAMPLAS

RAMPLAS is a 3-years EC-funded research project envisioning the development and demonstration of a Silicon-based, integrated Optical RAM chip for enabling High-Speed Applications in Computing and Communications. RAMPLAS has been launched in September 2011 and is supported by the European Commission within the Seventh Framework Programme (FP7‐ICT‐2009‐C).

For over two decades ICT witnesses the steadily increasing gap between processor and memory speed. Electronic RAM has been proven incapable of keeping up with clock frequency advances and essentially unable to break the nanosecond access times barrier, forming a major obstacle in the system’s performance that is commonly referred to as the “Memory Wall”. CPU speed improved at an annual rate of 55% while memory speed only improved at 10%. This steadily increasing gap between processor and memory clock frequencies was pointed out for the first time in the mid ‘90s, wisely and early on predicting that system performance will “hit” upon the “Memory Wall”. Current state-of-the-art Static RAM and DDR3 DRAM configurations offer only 300 ps and 5 ns access times, respectively, which are inconsistent and disproportionate to CPU clock frequencies.

To address this issue RAMPLAS will revisit RAM fundamentals and will lay the foundations for optical RAM technology and for optical RAM-enabled "green” and ultra-fast computing architectures. RAMPLAS will develop the first 100GHz optical RAM chips and will foster a new framework of disciplines for its effective application in ICT.
RAMPLAS will rely on the Silicon-on-Insulator fabrication technology for the deployment of its silicon-based optical RAM chips, pursuing the heterointegration of novel dilute-nitride SOA devices at 1.55μm for serving as active switching elements.

Read more in the objectives section>